Implementation of high speed and energy efficient carry skip adder

  • Unique Paper ID: 145292
  • Volume: 4
  • Issue: 8
  • PageNo: 407-414
  • Abstract:
  • In this paper we design carry skip adder for the purpose of lower energy consumption and it gives higher speed. The main function is that improves the delay, it is also known as carry bypass adder. The carry skip adder is that improves the delay of ripple carry adder with less effort compared with the other adder. Also the improvement in the worst-case delay is achieved by using various carry-skip adders to form a block-carry-skip adder. In this paper we shown that efficient carry skip adder in terms speed enhancement and it can be achieved by various method such as concatenation and increme ntation method. Also in addition, instead of using multiplexer logic, the proposed scheme makes use of AND OR Invert and OR AND Invert compound gate for the skip logic. AND OR Invert logic gates and AOI are basically two level compound logic functions constructed by or from the combination of one or more AND gates followed by a NOR gate. Also these gates can be easily implemented in CMOS circuitry. And or gates are particularly better than the total number of transistors or gate less than if the AND, NOT and OR functions were implemented separately. These results are in increased speed, reduced power, smaller area and potentially lower fabrication cost. And the results can be obtained by various tools such as Xilinx and Modesim 6.4b. Using this we can improves the delay on an average of 45% and the energy will be minimum 39%. Using CSKA we can achieve reduction power consumption compared with latest works in the field.
add_icon3email to a friend

Copyright & License

Copyright © 2025 Authors retain the copyright of this article. This article is an open access article distributed under the Creative Commons Attribution License which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

BibTeX

@article{145292,
        author = {Pranita R.Bujadkar and N N Gyanchandani},
        title = {Implementation of high speed and energy efficient carry skip adder},
        journal = {International Journal of Innovative Research in Technology},
        year = {},
        volume = {4},
        number = {8},
        pages = {407-414},
        issn = {2349-6002},
        url = {https://ijirt.org/article?manuscript=145292},
        abstract = {In this paper we design carry skip adder for the purpose of lower energy consumption and it gives higher speed. The main function is that improves the delay, it is also known as carry bypass adder. The carry skip adder is that improves the delay of ripple carry adder with less effort compared with the other adder. Also the improvement in the worst-case delay is achieved by using various  carry-skip adders to form a block-carry-skip adder.  In this paper we shown that efficient carry skip adder in terms speed enhancement and it can be achieved by various method such as concatenation and increme ntation method. Also in addition, instead of using multiplexer logic, the proposed scheme makes use of AND OR Invert and OR AND Invert compound gate for the skip logic. 
             AND OR Invert  logic  gates and AOI  are basically  two level compound logic functions constructed by or from the combination of one or more AND gates followed by a NOR gate. Also these gates can be easily implemented in CMOS circuitry. And or gates are particularly better than the total number of transistors or gate less than if the AND, NOT and OR functions were implemented separately. These results are in increased speed, reduced power, smaller area and potentially lower fabrication cost. And the results can be obtained by various tools such as Xilinx and Modesim 6.4b. Using this we can improves the delay on an average of 45% and the energy will be minimum 39%. Using CSKA we can achieve reduction power consumption compared with latest works in the field.},
        keywords = {AOI,OAI,CSKA,RCA, PPA,CSLA},
        month = {},
        }

Cite This Article

  • ISSN: 2349-6002
  • Volume: 4
  • Issue: 8
  • PageNo: 407-414

Implementation of high speed and energy efficient carry skip adder

Related Articles

Join Our IPN

IJIRT Partner Network

Submit your research paper and those of your network (friends, colleagues, or peers) through your IPN account, and receive 800 INR for each paper that gets published.

Join Now arrowright18x

Recent Conferences

NCSEM 2024

National Conference on Sustainable Engineering and Management - 2024 Last Date: 15th March 2024

Submit inquiry arrowright18x