DESIGN OF POWER AND ENERGY EFFICIENT APPROXIMATE MULTIPLIER IN XILINX

TURAKA BHAVANI; T.RATNAMALA

DESIGN OF POWER AND ENERGY EFFICIENT APPROXIMATE MULTIPLIER IN XILINX

Authors: TURAKA BHAVANI, T.RATNAMALA

Unique Paper ID: 148542
Volume: 6
Issue: 3
PageNo: 27-30

Keywords: Approximate Carry Adder Three Dimensional Reduction method Approximate Multiplier

Abstract:
Mixed media and picture handling applications, may endure blunders in calculations yet at the same time create important and gainful outcomes. This work manages a rapid inexact multiplier with TDM tree and convey forecast circuit. The changed multiplier uses an enhanced TDM convey spare tree which decreases the gadget usage on FPGA and additionally the combinational way deferral and power utilization.

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Cite This Article

ISSN: 2349-6002
Volume: 6
Issue: 3
PageNo: 27-30

DESIGN OF POWER AND ENERGY EFFICIENT APPROXIMATE MULTIPLIER IN XILINX

Available:https://ijirt.org/Article?manuscript=148542

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Impact Factor
8.01 (Year 2024)

UGC Approved
Journal no 47859

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