An Enactmentof Interconnect Circuit Techniquesfor Energy Efficient on-Chip Interconnects

Bukya Balaji

An Enactmentof Interconnect Circuit Techniquesfor Energy Efficient on-Chip Interconnects

Authors: Bukya Balaji

Unique Paper ID: 144513
Volume: 2
Issue: 2
PageNo: 273-277

Keywords: Interconnect repeaters wire Current mode differentialsignaling clamped bit line Sense Amplifier.

Abstract:
This paper presents a relative study ondifferent interconnect circuit techniques for on chipinterconnects. We have related different circuit structure byemploying on RC and RLC interconnects. In this delay benefit forcurrent sensing rises with an increase in wire width. Contrastingrepeaters, current sensing does not require placement of buffersalong the wire and it eliminates any placement constraints. Outof all these techniques a differential RLC current mode signalingcircuit insertion has offered the less amount of energy.

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Cite This Article

ISSN: 2349-6002
Volume: 2
Issue: 2
PageNo: 273-277

An Enactmentof Interconnect Circuit Techniquesfor Energy Efficient on-Chip Interconnects

Available:https://ijirt.org/Article?manuscript=144513

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